Ian GaltonProfessor, Electrical & Computer Engineering
Data converters, frequency synthesizers, clock-recovery systems, digital signal processing (DSP) techniques to mitigate the effects of non-ideal analog circuit behavior in mixed-signal integrated circuits (ICs) implemented in CMOS (silicon chips). Ian Galton manages the Integrated Signal Processing Group at UCSD. The group's research objective is to generate enabling technology for highly integrated, low-cost, communication systems. The research involves the invention, development, analysis, and CMOS integrated circuit implementation of key communication system blocks such as data converters, frequency synthesizers, and clock recovery systems. The emphasis of the research is on the development of digital signal processing techniques to mitigate the effects of non-ideal analog circuit behavior in mixed-signal (combined analog and digital) integrated circuits. The resulting circuits tend to blur the traditionally sharp analog-digital dividing lines in communication systems in order to reduce the precision requirements of the analog circuitry. Current research topics include: Mismatch-shaping DACs for high-performance delta-sigma data converters Segmented dynamic element matching for Nyquist-rate, high-resolution DACs DAC noise cancellation and interstage gain error compensation techniques in pipelined ADCs Digital correction of analog non-linearity in pipelined ADCs Fractional-N phase-locked loop frequency synthesis Injection locking techniques for phase noise reduction in frequency synthesizers For additional information, see publication list ( http://ispg.ucsd.edu/publications.php). Capsule Bio: |
Web Page Email: iagalton@ucsd.edu Office Phone: 858-822-1332 Institute Affiliation:
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